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STM32F407的引脚说明

news 来源：原创 2025/4/19 7:53:01

当笔记站
引脚说明在STM32F407数据手册中的48页到71页，下载地址：

https://www.stmcu.com.cn/Designresource/detail/document/696193?auto_download=1

以下是在图片转表格得到的东西
 

Pinouts and pin description                                                                    STM32F405xx, STM32F407xx
Table 7. STM32F40xxx pin and ball definitions (1)
Pin numberPin name
(function after
reset) (2)		Pin typeI / O structureNotesAlternate functionsAdditional
functions
LQFP64WLCSP90LQFP100LQFP144UFBGA176LQFP176
--11A21PE2I/OFT-TRACECLK/ FSMC_A23 /
ETH_MII_TXD3 /
EVENTOUT		-
--22A12PE3I/OFT-TRACED0/FSMC_A19 /
EVENTOUT		-
--33B13PE4I/OFT-TRACED1/FSMC_A20 /
DCMI_D4/ EVENTOUT		-
--44B24PE5I/OFT-TRACED2 / FSMC_A21 /
TIM9_CH1 / DCMI_D6 /
EVENTOUT		-
--55B35PE6I/OFT-TRACED3 / FSMC_A22 /
TIM9_CH2 / DCMI_D7 /
EVENTOUT		-
1A1066C16V BATS----
----D27PI8I/OFT(3)(
4)		-RTC_TAMP1,
RTC_TAMP2,
RTC_TS
2A977D18PC13I/OFT(3)
(4)		-
3B1088E19PC14/OSC32_IN
(PC14)		I/OFT(3)(
4)		-OSC32_IN (5)
4B999F110PC15/
OSC32_OUT
(PC15)		I/OFT(3)(
4)		-OSC32_
RTC_OUT,
RTC_TAMP1,
RTC_TS
OSC32_IN (5)
OUT (5)
----D311PI9I/OFT-CAN1_RX / EVENTOUT-
----E312PI10I/OFT-ETH_MII_RX_ER /
EVENTOUT		-
----E413PI11I/OFT-OTG_HS_ULPI_DIR /
EVENTOUT		-
----F214V SSS----
----F315V DDS----
---10E216PF0I/OFT-FSMC_A0 / I2C2_SDA /
EVENTOUT		-
---11H317PF1I/OFT-FSMC_A1 / I2C2_SCL /
EVENTOUT		-
---12H218PF2I/OFT-FSMC_A2 / I2C2_SMBA /
EVENTOUT		-
---13J219PF3I/OFT(5)FSMC_A3/EVENTOUTADC3_IN9
---14J320PF4I/OFT(5)FSMC_A4/EVENTOUTADC3_IN14
---15K321PF5I/OFT(5)FSMC_A5/EVENTOUTADC3_IN15
-C91016G222V SSS----
-B81117G323V DDS----
---18K224PF6I/OFT(5)TIM10_CH1 /
FSMC_NIORD/
EVENTOUT		ADC3_IN4
---19K125PF7I/OFT(5)TIM11_CH1/FSMC_NREG/
EVENTOUT		ADC3_IN5
---20L326PF8I/OFT(5)TIM13_CH1 /
FSMC_NIOWR/
EVENTOUT		ADC3_IN6
---21L227PF9I/OFT(5)TIM14_CH1 / FSMC_CD/
EVENTOUT		ADC3_IN7
---22L128PF10I/OFT(5)FSMC_INTR/ EVENTOUTADC3_IN8
5F101223G129PH0/OSC_IN
(PH0)		I/OFT-EVENTOUTOSC_IN (5)
6F91324H130PH1/OSC_OUT
(PH1)		I/OFT-EVENTOUTOSC_OUT (5)
7G101425J131NRSTI/ORST---
8E101526M232PC0I/OFT(5)OTG_HS_ULPI_STP/
EVENTOUT		ADC123_IN10
9-1627M333PC1I/OFT(5)ETH_MDC/ EVENTOUTADC123_IN11
10D101728M434PC2I/OFT(5)SPI2_MISO /
OTG_HS_ULPI_DIR /
ETH_MII_TXD2
/I2S2ext_SD/ EVENTOUT		ADC123_IN12
11E91829M535PC3I/OFT(5)SPI2_MOSI / I2S2_SD /
OTG_HS_ULPI_NXT /
ETH_MII_TX_CLK /
EVENTOUT		ADC123_IN13
--1930-36V DDS----
12H102031M137V SSAS----
----N1-V REF –S----
--2132P138V REF+S----
13G92233R139V DDAS----
14C102334N340PA0/WKUP
(PA0)		I/OFT(6)USART2_CTS/
UART4_TX/
ETH_MII_CRS /
TIM2_CH1_ETR/
TIM5_CH1 / TIM8_ETR/
EVENTOUT		ADC123_IN0/WK
UP (5)
15F82435N241PA1I/OFT(5)USART2_RTS /
UART4_RX/
ETH_RMII_REF_CLK /
ETH_MII_RX_CLK /
TIM5_CH2 / TIM2_CH2/
EVENTOUT		ADC123_IN1
16J102536P242PA2I/OFT(5)USART2_TX/TIM5_CH3 /
TIM9_CH1 / TIM2_CH3 /
ETH_MDIO/ EVENTOUT		ADC123_IN2
----F443PH2I/OFT-ETH_MII_CRS/EVENTOUT-
----G444PH3I/OFT-ETH_MII_COL/EVENTOUT-
----H445PH4I/OFT-I2C2_SCL /
OTG_HS_ULPI_NXT/
EVENTOUT		-
----J446PH5I/OFT-I2C2_SDA/ EVENTOUT-
17H92637R247PA3I/OFT(5)USART2_RX/TIM5_CH4 /
TIM9_CH2 / TIM2_CH4 /
OTG_HS_ULPI_D0 /
ETH_MII_COL/
EVENTOUT		ADC123_IN3
18E52738--V SSS----
-D9--L448BYPASS_REGIFT---
19E42839K449V DDS----
20J92940N450PA4I/OTTa(5)SPI1_NSS / SPI3_NSS /
USART2_CK /
DCMI_HSYNC /
OTG_HS_SOF/ I2S3_WS/
EVENTOUT		ADC12_IN4
/DAC_OUT1
21G83041P451PA5I/OTTa(5)SPI1_SCK/
OTG_HS_ULPI_CK /
TIM2_CH1_ETR/
TIM8_CH1N/ EVENTOUT		ADC12_IN5/DAC
_OUT2
22H83142P352PA6I/OFT(5)SPI1_MISO /
TIM8_BKIN/TIM13_CH1 /
DCMI_PIXCLK / TIM3_CH1
/ TIM1_BKIN / EVENTOUT		ADC12_IN6
23J83243R353PA7I/OFT(5)SPI1_MOSI/ TIM8_CH1N /
TIM14_CH1/TIM3_CH2/
ETH_MII_RX_DV /
TIM1_CH1N /
ETH_RMII_CRS_DV/
EVENTOUT		ADC12_IN7
24-3344N554PC4I/OFT(5)ETH_RMII_RX_D0 /
ETH_MII_RX_D0/
EVENTOUT		ADC12_IN14
25-3445P555PC5I/OFT(5)ETH_RMII_RX_D1 /
ETH_MII_RX_D1/
EVENTOUT		ADC12_IN15
26G73546R556PB0I/OFT(5)TIM3_CH3 / TIM8_CH2N/
OTG_HS_ULPI_D1/
ETH_MII_RXD2 /
TIM1_CH2N/ EVENTOUT		ADC12_IN8
27H73647R457PB1I/OFT(5)TIM3_CH4 / TIM8_CH3N/
OTG_HS_ULPI_D2/
ETH_MII_RXD3 /
TIM1_CH3N/ EVENTOUT		ADC12_IN9
28J73748M658PB2/BOOT1
(PB2)		I/OFT-EVENTOUT-
---49R659PF11I/OFT-DCMI_D12/ EVENTOUT-
---50P660PF12I/OFT-FSMC_A6/ EVENTOUT-
---51M861V SSS----
---52N862V DDS----
---53N663PF13I/OFT-FSMC_A7/ EVENTOUT-
---54R764PF14I/OFT-FSMC_A8/ EVENTOUT-
---55P765PF15I/OFT-FSMC_A9/ EVENTOUT-
---56N766PG0I/OFT-FSMC_A10/ EVENTOUT-
---57M767PG1I/OFT-FSMC_A11/ EVENTOUT-
-G63858R868PE7I/OFT-FSMC_D4/TIM1_ETR/
EVENTOUT		-
-H63959P869PE8I/OFT-FSMC_D5/ TIM1_CH1N/
EVENTOUT		-
-J64060P970PE9I/OFT-FSMC_D6/TIM1_CH1/
EVENTOUT		-
---61M971V SSS----
---62N972V DDS----
-F64163R973PE10I/OFT-FSMC_D7/TIM1_CH2N/
EVENTOUT		-
-J54264P1074PE11I/OFT-FSMC_D8/TIM1_CH2/
EVENTOUT		-
-H54365R1075PE12I/OFT-FSMC_D9/TIM1_CH3N/
EVENTOUT		-
-G54466N1176PE13I/OFT-FSMC_D10/TIM1_CH3/
EVENTOUT		-
-F54567P1177PE14I/OFT-FSMC_D11/TIM1_CH4/
EVENTOUT		-
-G44668R1178PE15I/OFT-FSMC_D12/TIM1_BKIN/
EVENTOUT		-
29H44769R1279PB10I/OFT-SPI2_SCK / I2S2_CK /
I2C2_SCL/ USART3_TX /
OTG_HS_ULPI_D3 /
ETH_MII_RX_ER /
TIM2_CH3/ EVENTOUT		-
30J44870R1380PB11I/OFT-I2C2_SDA/USART3_RX/
OTG_HS_ULPI_D4 /
ETH_RMII_TX_EN/
ETH_MII_TX_EN /
TIM2_CH4/ EVENTOUT		-
31F44971M1081V CAP_1S----
32-5072N1082V DDS----
----M1183PH6I/OFT-I2C2_SMBA / TIM12_CH1 /
ETH_MII_RXD2/
EVENTOUT		-
----N1284PH7I/OFT-I2C3_SCL /
ETH_MII_RXD3/
EVENTOUT		-
----M1285PH8I/OFT-I2C3_SDA /
DCMI_HSYNC/
EVENTOUT		-
----M1386PH9I/OFT-I2C3_SMBA / TIM12_CH2/
DCMI_D0/ EVENTOUT		-
----L1387PH10I/OFT-TIM5_CH1 / DCMI_D1/
EVENTOUT		-
----L1288PH11I/OFT-TIM5_CH2 / DCMI_D2/
EVENTOUT		-
----K1289PH12I/OFT-TIM5_CH3 / DCMI_D3/
EVENTOUT		-
----H1290V SSS----
----J1291V DDS----
Pin numberPin name
(function after
reset) (2)		Alternate functionsAdditional
functions
33J35173P1292PB12I/OFT-SPI2_NSS / I2S2_WS /
I2C2_SMBA/
USART3_CK/ TIM1_BKIN /
CAN2_RX /
OTG_HS_ULPI_D5/
ETH_RMII_TXD0 /
ETH_MII_TXD0/
OTG_HS_ID/ EVENTOUT		-
34J15274P1393PB13I/OFT-SPI2_SCK / I2S2_CK /
USART3_CTS/
TIM1_CH1N /CAN2_TX /
OTG_HS_ULPI_D6 /
ETH_RMII_TXD1 /
ETH_MII_TXD1/
EVENTOUT		OTG_HS_VBUS
35J25375R1494PB14I/OFT-SPI2_MISO/ TIM1_CH2N /
TIM12_CH1 /
OTG_HS_DM/
USART3_RTS /
TIM8_CH2N/I2S2ext_SD/
EVENTOUT		-
36H15476R1595PB15I/OFT-SPI2_MOSI / I2S2_SD/
TIM1_CH3N / TIM8_CH3N
/ TIM12_CH2 /
OTG_HS_DP/ EVENTOUT		RTC_REFIN
-H25577P1596PD8I/OFT-FSMC_D13 / USART3_TX/
EVENTOUT		-
-H35678P1497PD9I/OFT-FSMC_D14 / USART3_RX/
EVENTOUT		-
-G35779N1598PD10I/OFT-FSMC_D15 / USART3_CK/
EVENTOUT		-
-G15880N1499PD11I/OFT-FSMC_CLE /
FSMC_A16/USART3_CTS/
EVENTOUT		-
-G25981N13100PD12I/OFT-FSMC_ALE/
FSMC_A17/TIM4_CH1 /
USART3_RTS/
EVENTOUT		-
--6082M15101PD13I/OFT-FSMC_A18/TIM4_CH2/
EVENTOUT		-
---83-102V SSS----
---84J13103V DDS----
-F26185M14104PD14I/OFT-FSMC_D0/TIM4_CH3/
EVENTOUT/ EVENTOUT		-
-F16286L14105PD15I/OFT-FSMC_D1/TIM4_CH4/
EVENTOUT		-
---87L15106PG2I/OFT-FSMC_A12/ EVENTOUT-
---88K15107PG3I/OFT-FSMC_A13/ EVENTOUT-
---89K14108PG4I/OFT-FSMC_A14/ EVENTOUT-
---90K13109PG5I/OFT-FSMC_A15/ EVENTOUT-
---91J15110PG6I/OFT-FSMC_INT2/ EVENTOUT-
---92J14111PG7I/OFT-FSMC_INT3 /USART6_CK/
EVENTOUT		-
---93H14112PG8I/OFT-USART6_RTS /
ETH_PPS_OUT/
EVENTOUT		-
---94G12113V SSS---
---95H13114V DDS---
37F36396H15115PC6I/OFT-I2S2_MCK /
TIM8_CH1/SDIO_D6 /
USART6_TX /
DCMI_D0/TIM3_CH1/
EVENTOUT		-
38E16497G15116PC7I/OFT-I2S3_MCK /
TIM8_CH2/SDIO_D7 /
USART6_RX /
DCMI_D1/TIM3_CH2/
EVENTOUT		-
39E26598G14117PC8I/OFT-TIM8_CH3/SDIO_D0
/TIM3_CH3/ USART6_CK /
DCMI_D2/ EVENTOUT		-
40E36699F14118PC9I/OFT-I2S_CKIN/ MCO2 /
TIM8_CH4/SDIO_D1 /
/I2C3_SDA / DCMI_D3 /
TIM3_CH4/ EVENTOUT		-
41D167100F15119PA8I/OFT-MCO1 / USART1_CK/
TIM1_CH1/ I2C3_SCL/
OTG_FS_SOF/
EVENTOUT		-
42D268101E15120PA9I/OFT-USART1_TX/ TIM1_CH2 /
I2C3_SMBA / DCMI_D0/
EVENTOUT		OTG_FS_VBUS
43D369102D15121PA10I/OFT-USART1_RX/ TIM1_CH3/
OTG_FS_ID/DCMI_D1/
EVENTOUT		-
44C170103C15122PA11I/OFT-USART1_CTS / CAN1_RX
/ TIM1_CH4 /
OTG_FS_DM/ EVENTOUT		-
45C271104B15123PA12I/OFT-USART1_RTS / CAN1_TX/
TIM1_ETR/ OTG_FS_DP/
EVENTOUT		-
46D472105A15124PA13
(JTMS-SWDIO)		I/OFT-JTMS-SWDIO/ EVENTOUT-
47B173106F13125V CAP_2S----
-E774107F12126V SSS----
48E675108G13127V DDS----
----E12128PH13I/OFT-TIM8_CH1N / CAN1_TX/
EVENTOUT		-
----E13129PH14I/OFT-TIM8_CH2N / DCMI_D4/
EVENTOUT		-
----D13130PH15I/OFT-TIM8_CH3N / DCMI_D11/
EVENTOUT		-
-C3--E14131PI0I/OFT-TIM5_CH4 / SPI2_NSS /
I2S2_WS / DCMI_D13/
EVENTOUT		-
-B2--D14132PI1I/OFT-SPI2_SCK / I2S2_CK /
DCMI_D8/ EVENTOUT		-
----C14133PI2I/OFT-TIM8_CH4 /SPI2_MISO /
DCMI_D9 / I2S2ext_SD/
EVENTOUT		-
----C13134PI3I/OFT-TIM8_ETR / SPI2_MOSI /
I2S2_SD / DCMI_D10/
EVENTOUT		-
----D9135V SSS----
----C9136V DDS----
49A276109A14137PA14
(JTCK/SWCLK)		I/OFT-JTCK-SWCLK/ EVENTOUT-
50B377110A13138PA15
(JTDI)		I/OFT-JTDI/ SPI3_NSS/
I2S3_WS/TIM2_CH1_ETR
/ SPI1_NSS / EVENTOUT		-
51D578111B14139PC10I/OFT-SPI3_SCK / I2S3_CK/
UART4_TX/SDIO_D2 /
DCMI_D8 / USART3_TX/
EVENTOUT		-
52C479112B13140PC11I/OFT-UART4_RX/ SPI3_MISO /
SDIO_D3 /
DCMI_D4/USART3_RX /
I2S3ext_SD/ EVENTOUT		-
53A380113A12141PC12I/OFT-UART5_TX/SDIO_CK /
DCMI_D9 / SPI3_MOSI
/I2S3_SD / USART3_CK/
EVENTOUT		-
-D681114B12142PD0I/OFT-FSMC_D2/CAN1_RX/
EVENTOUT		-
-C582115C12143PD1I/OFT-FSMC_D3 / CAN1_TX/
EVENTOUT		-
54B483116D12144PD2I/OFT-TIM3_ETR/UART5_RX/
SDIO_CMD / DCMI_D11/
EVENTOUT		-
--84117D11145PD3I/OFT-FSMC_CLK/
USART2_CTS/
EVENTOUT		-
-A485118D10146PD4I/OFT-FSMC_NOE/
USART2_RTS/
EVENTOUT		-
-C686119C11147PD5I/OFT-FSMC_NWE/USART2_TX/
EVENTOUT		-
---120D8148V SSS----
---121C8149V DDS----
-B587122B11150PD6I/OFT-FSMC_NWAIT/
USART2_RX/ EVENTOUT		-
-A588123A11151PD7I/OFT-USART2_CK/FSMC_NE1/
FSMC_NCE2/ EVENTOUT		-
---124C10152PG9I/OFT-USART6_RX /
FSMC_NE2/FSMC_NCE3/
EVENTOUT		-
---125B10153PG10I/OFT-FSMC_NCE4_1/
FSMC_NE3/ EVENTOUT		-
---126B9154PG11I/OFT-FSMC_NCE4_2 /
ETH_MII_TX_EN/
ETH _RMII_TX_EN/
EVENTOUT		-
---127B8155PG12I/OFT-FSMC_NE4 /
USART6_RTS/
EVENTOUT		-
---128A8156PG13I/OFT-FSMC_A24 /
USART6_CTS
/ETH_MII_TXD0/
ETH_RMII_TXD0/
EVENTOUT		-
---129A7157PG14I/OFT-FSMC_A25 / USART6_TX
/ETH_MII_TXD1/
ETH_RMII_TXD1/
EVENTOUT		-
-E8-130D7158V SSS----
-F7-131C7159V DDS----
---132B7160PG15I/OFT-USART6_CTS /
DCMI_D13/ EVENTOUT		-
55B689133A10161PB3
(JTDO/
TRACESWO)		I/OFT-JTDO/ TRACESWO/
SPI3_SCK / I2S3_CK /
TIM2_CH2 / SPI1_SCK/
EVENTOUT		-
56A690134A9162PB4
(NJTRST)		I/OFT-NJTRST/ SPI3_MISO /
TIM3_CH1 / SPI1_MISO /
I2S3ext_SD/ EVENTOUT		-
57D791135A6163PB5I/OFT-I2C1_SMBA/ CAN2_RX /
OTG_HS_ULPI_D7 /
ETH_PPS_OUT/TIM3_CH2
/ SPI1_MOSI/ SPI3_MOSI /
DCMI_D10 / I2S3_SD/
EVENTOUT		-
58C792136B6164PB6I/OFT-I2C1_SCL/ TIM4_CH1 /
CAN2_TX /
DCMI_D5/USART1_TX/
EVENTOUT		-
59B793137B5165PB7I/OFT-I2C1_SDA / FSMC_NL /
DCMI_VSYNC /
USART1_RX/ TIM4_CH2/
EVENTOUT		-
60A794138D6166BOOT0IB--V PP
61D895139A5167PB8I/OFT-TIM4_CH3/SDIO_D4/
TIM10_CH1 / DCMI_D6 /
ETH_MII_TXD3 /
I2C1_SCL/ CAN1_RX/
EVENTOUT		-
62C896140B4168PB9I/OFT-SPI2_NSS/ I2S2_WS /
TIM4_CH4/ TIM11_CH1/
SDIO_D5 / DCMI_D7 /
I2C1_SDA / CAN1_TX/
EVENTOUT		-
--97141A4169PE0I/OFT-TIM4_ETR / FSMC_NBL0 /
DCMI_D2/ EVENTOUT		-
--98142A3170PE1I/OFT-FSMC_NBL1 / DCMI_D3/
EVENTOUT		-
63-99-D5-V SSS----
-A8-143C6171PDR_ONIFT---
64A110
0		144C5172V DDS----
----D4173PI4I/OFT-TIM8_BKIN / DCMI_D5/
EVENTOUT		-
----C4174PI5I/OFT-TIM8_CH1 /
DCMI_VSYNC/
EVENTOUT		-
----C3175PI6I/OFT-TIM8_CH2 / DCMI_D6/
EVENTOUT		-
----C2176PI7I/OFT-TIM8_CH3 / DCMI_D7/
EVENTOUT		-
1. UFBGA176 F6, F7, F8, F9, F10, G6, G7, G8, G9, G10, H6, H7, H8, H9, H10, J6, J7, J8, J9, J10, K6, K7, K8, K9 and K10
balls are connected to VSS for heat dissipation and package mechanical stability.
2. Function availability depends on the chosen device.
3. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited amount of current
(3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited:
- The speed should not exceed 2 MHz with a maximum load of 30 pF.
- These I/Os must not be used as a current source (e.g. to drive an LED).
4. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F4xx reference manual, available from the STMicroelectronics website:
www.st.com.
5. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
6. If the device is delivered in an UFBGA176 or WLCSP90 and the BYPASS_REG pin is set to VDD (Regulator off/internal
reset ON mode), then PA0 is used as an internal Reset (active low).

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